News, Articles and Updates

In our Services department we see all sorts of systems, network switches, routers, and medical devices, etc. They all share a common theme….the DDR Memory does not work right. The engineers sending us these problem systems are frustrated and we ...

We learned recently that Tektronix has discontinued the last of its logic analyzer family. Sigh….Here at FuturePlus Systems we walked the careful balance between the two Whales, Tektronix and HP/Agilent/Keysight. Mostly siding with the later and ...

FAST SODIMMS for DDR4 are here!

A Reliability, Availability and Serviceability (aka RAS) feature more clearly documented in the new JEDEC DDR4 Rev B spec, Gear-down mode, allows the DRAM Address/Command and Control bus to use every other rising clock of the DDR4 Memory bus clock.

In order to give DDR4 a mid life kicker memory vendors are up’ing their game and producing 3DS DDR4 DIMMs. What is 3DS you ask? Its 3 Dimensional Stacking of die in a single package. Not to be confused by ‘twin die’ which is just 2 die next to each ...

Those of you who read my previous Blog post on the new DDR4 Revision B spec know that DDR4 has a much better defined Rounding Algorithm. So why is this important?

Finally! After 2 ½ years FuturePlus Systems was successful in sponsoring JEDEC’s first document on protocol checks, JEP175 DDR4 Protocol Checks. But we didn’t do it alone! Many thanks to the other Test and Measurement vendors, EDA vendors and ...

The JEDEC JC42.3 committees have issued the B version of the DDR4 specification. This version is several years in the making as the original JESD 79-4 DDR4 SDRAM specification was released in September 2012 and the A version published in November of ...