Recently JEDEC announced the new JESD209-5 Low Power Double Data Rate 5 (LPDDR5) specification. LPDDR5 is faster and lower power than its predecessors LPDDR4 and LPDDR4x. Want a copy of the specification? Click Here
Highlighted below are some of the key differences over the previous generation LPDDR4/LPDDR4X:
Higher data rate up to 6400MT/s
New features for Automotive Applications including:
Multi-clocking architecture allows for the Data and the Address/Command/Control to have separate yet synchronous clocks. This makes capture of the A/C/C much easier and cost effective for development teams.
Multi-bank architecture. LPDDR5 introduces 3 different programmable bank architectures. The are:
Non Targeted ODT (On Die Termination) for the DQ data signals to support the higher data rate. This is where the ODT for parts that are not being accessed is driven.
The addition of DFE to help deliver an eye at the higher data rates. Like DDR5 we expect to see this ‘turned on’ at data rates over 4400MT/s.
Power Savings features:
What applications are the target for the new LPDDR5 standard?
The largest is the mobile cell phone and tablet market. The second largest would be automotive. The one thing I see missing in the LPDDR5 standard is someway of measuring the signal fidelity from inside the part. A loopback mechanism would go a long way to improve this situation. Also the LPDDR5 specification contains no actual BGA packaging details in this revision. As a member of the committee I can tell you that folks are working hard to fill in the blanks!
As of April 2019, several companies have announced products for LPDDR5. Specifically, Samsung has announced an 8Gb part. Both Cadence and Synopsys have announced controller IP and of course yours truly FuturePlus Systems has an LPDDR5 version of its popular DDR Detective.
Need quote on a LPDDR5 BGA Interposer or the LPDDR5 Detective? Contact us we would be happy to help.